Design of Energy Efficient Binary to Excess-3 Converter Using Adiabatic Techniques

The power consumption of the electronic devices can be reduced by adopting different design styles. Adiabatic logic style is said to be an attractive solution for such low power electronic applications. This paper presents an energy efficient technique for binary to EX-3 code converter that uses adiabatic logic. The proposed technique has less power dissipation when compared to the conventional CMOS design style. This paper evaluates the binary to EX-3 code converter in different adiabatic logic styles and their results were compared with the conventional CMOS design. The simulation results indicate that the proposed technique is advantageous in many of the low power digital applications. Keywords—Adiabatic, Charge recovery, low power, energy efficient, digital circuits, sinusoidal power clock